1. Field of the Invention
The present invention relates to a method for producing a semiconductor device for use in electrodes of capacitors in storage devices which contributes to production of a higher degree of integration of so-called very large scale integration (VLSI) the method being effective in filling fine deep hollows with semiconductor films having a low resistivity.
2. Description of the Prior Art
A trench structure has been utilized for isolation of respective devices and capacitor devices in order to increase the degree of integration for large scale integration (LSI). In general, polycrystalline silicon films (referred to as poly-Si films hereinunder) produced by a low pressure CVD process have an excellent step covering capability or step coverage, so that they have been used in filling the trench structure. For electrodes of capacitor devices, however, the poly-Si films have been doped with impurities as dopants to reduce their resistivities because materials for the electrodes should have a low resistivity. An attempt has been made to achieve the deposition of poly-Si films doped with impurities by effecting the doping with dopants produced from POCl.sub.2 through a thermal diffusion process, or a CVD process. The former process where the dopants produced by decomposition of POCl.sub.3 are thermally diffused, comprises, as illustrated in FIG. 1(a) first depositing a poly-Si film 5 on Si substrate 1 having trench 3, on the walls of which SiO.sub.2 film 2 has been formed as a capacitor oxide film, so as to fill the cavity of the trench with the poly-Si film, while levelling the top surface. Then poly-Si film 5 is doped with phosphorus from POCl.sub.3 in a thermal diffusion furnace by thermally diffusing the phosphorus into the film, as shown in FIG. 1(b). This method, however, suffers from disadvantages in that when the trench has a significantly increased aspect ratio, uniform diffusion of phosphorus to the bottom of the trench is not achieved at usual concentrations of the phosphorus resulting in non-uniform distribution thereof, although uniform diffusion of phosphorus may be realized at higher concentrations. Therefore, the method is unsuitable in densely integrated devices. An alternative attempt at doping uniformly in the trench having a high aspect ratio may be illustrated with reference to FIG. 2. As seen from FIG. 2(a), the first poly-Si film 6 is deposited to a lower thickness (about 0.1 .mu.m) on Si substrate 1 having trench 3, on the surface of which SiO.sub.2 film 2 has been formed as capacitor oxide film. Then, as shown in FIG. 2(b), phosphorus produced by thermal decomposition of POCl.sub.3 is thermally diffused throughout the first poly-Si film 6 in a thermal diffusion furnace and thereafter a phosphorus glass layer formed on the surface of the poly-Si film during the process is removed. Then, as shown in FIG. 2(c), the second poly-Si film 7 is deposited to a higher thickness (about 2 .mu.m) so as to fill trench 3 while levelling the top of the substrate. After annealing, the poly-Si films on the upper surface of the substrate are etched to remove the first and the second poly-Si films 6 and 7 leaving only parts thereof which are contained in the trench by allowing SiO.sub.2 films 4 to function as a stopper on etching, as shown in FIG. 2(d). During the heat-treating step as described above, phosphorus diffuses from poly-Si film 6 to poly-Si film 7 resulting in the formation of a low resistivity electrode. A problem in this method, however, is the complexity of the process. That is, the first poly-Si film 6 is deposited to a low thickness and doped with phosphorus through the thermal diffusion of phosphorus produced by decomposition of POCl.sub.3, and then the second poly-Si film 7 is deposited. Thus, the process is complicated.
On the other hand, as shown in FIG. 3(a) the latter method, where the doping with impurities as dopants is effected by a CVD process, suffers from the fact that poly-Si film 8 deposited with dopants by the CVD process exhibits a poor step coverage and voids 9 are formed during the step of filling the trench with the film as generally described by T. Morie and J. Murota in Jpn. J. Appl. Phys., Vol. 23, No. 7, 1984 pp. L482-L484. This fact causes the ingress of reaction gases into the voids 9 in the subsequent step of etching poly-Si film 8 so that the parts of poly-Si film 8 which are inside the trench are also etched as shown in FIG. 3(b). This problem becomes more significant, as the extent of integration is increased and the trench has dimensions narrower in width and greater in depth.